The invention relates to high-speed CMOS operational amplifiers, and particularly to gain boost circuitry that increases amplifier gain without increasing noise and without increasing amplifier instability.
The closest prior art is thought to be represented by commonly assigned U.S. Pat. No. 6,150,883 issued Nov. 21, 2000 to Ivanov and U.S. Pat. No. 6,356,153 issued Mar. 12, 2002 to Ivanov et al., both incorporated herein by reference, disclose prior gain boost circuitry. Also, see xe2x80x9cThe CMOS Gain-Boosting Techniquexe2x80x9d by K. Bult and G. Geelan in xe2x80x9cAnalog Integrated Circuits and Signal Processingxe2x80x9d, Volume I, pp 119-135 (1981).
A variety of CMOS current mirror circuits are generally known in art, particularly the current mirror which is incorporated within the single stage CMOS amplifier 40A shown in FIG. 3. That prior art current mirror includes P-channel transistors 4 and 5 and amplifier 16. However, the prior art does not disclose use of that current mirror as a gain boost circuit in a CMOS differential amplifier as shown in FIG. 3.
FIG. 1A shows a conventional CMOS differential amplifier input stage 1A including two differentially connected P-channel input transistors 2 and 3 having their sources connected to a tail current source 4. The drain of transistor 2 is connected by conductor 6 to a current mirror load circuit including N-channel transistors 4 and 5, the gates of which are connected to conductor 6. The sources of transistors 4 and 5 are connected to a low supply voltage Vxe2x88x92, and the drain of transistor 5 and the drain of transistor 3 are connected by conductor 7 to an output stage (not shown).
FIG. 1B shows another conventional CMOS differential amplifier input stage 1B in which input transistors 2 and 3 are connected as in FIG. 1A. However, in FIG. 1B the drains of input transistors 2 and 3 are connected by conductors 6 and 7 not only to N-channel load transistors 8 and 9, but also to N-channel cascode transistors 10 and 11 of a folded cascode circuit which also includes current sources 13 and 14. Specifically, conductor 7 is connected to the drain of load transistor 8 and to the source of cascode transistor 10, which has its drain connected by conductor 12 to the gates of load transistors 8 and 9 and to one terminal of current source circuit 13. Conductor 8 is connected to the drain of load transistor 9 and the source of cascode transistor 11, which has its drain connected to output conductor 15 and to current source circuit 14.
The voltage gain A of both of differential input stages 1A and 1B is given by the expression A=gmRout, where Rout is the equivalent differential resistance at the drains of the differential input transistors 2 and 3. Usually, an output stage (not shown) has a CMOS input transistor the gate of which is connected to the output of the differential input stage 1A or 1B. Therefore, Rout of the differential input stage is dominated by the drain impedances of the transistors connected to output conductor 7 of FIG. 1A or output conductor 15 of FIG. 1B. The voltage gain of the input stage 1A of FIG. 1A and the input stage 1B of FIG. 1B typically is roughly 10 to 20, and usually does not exceed 100 (although it is possible for the voltage gain of input stage 1B of FIG. 1B to be as high as 1000, due to the cascode circuitry.)
To achieve higher voltage gain in single stage differential amplifier circuits including folded cascode circuitry such as that shown in FIGS. 1A and 1B, gain boost circuits such as those disclosed in above mentioned commonly owned U.S. Pat. Nos. 6,150,883 and 6,356,153 and the above mentioned article by K. Bult and G. Geelan have been provided. FIG. 2 illustrates such a prior art differential amplifier input stage including such a gain boost circuit 16, wherein the (+) and (xe2x88x92) inputs of gain boost amplifier 16 are connected to conductors 7 and 6, respectively. The gate of cascode transistor 11 is connected to the output of gain boost amplifier 16, instead of to VBIAS. If the gain boost amplifier is configured as a voltage-input amplifier in the technique shown in FIG. 2, it introduces stability problems and complicates compensation of the amplifier circuit within which the differential amplifier input stage is included. However, if gain boost amplifier 16 is configured as a current-input amplifier to avoid the instability problem, that introduces additional undesirable noise and offset.
It should be understood that one skilled in art who desires to increase the gain of the differential amplifier shown in FIG. 2 by using the disclosed prior art gain boost technique faces several problems. If he/she wishes to use a voltage-input configuration for the gain boost amplifier 16, the differential amplifier circuit is likely to be quite unstable and require use of costly and inconvenient compensation circuitry. However, if he/she wishes to use a current-input configuration for the gain boost amplifier 16, that introduces additional undesirable noise and offset. In either case, some applications require a much larger voltage gain, e.g. greater than 120 dB, in which case a more complex multi-stage amplifier must be designed. Stated differently, differential amplifier shown in prior art FIG. 2 can provide only 30-40 dB of gain boost, which is not enough gain for many applications, and the noise or instability caused by use of the gain boost circuit 16 may be unacceptable. In such cases, the only available technique for achieving the gain is to provide a multi-stage amplifier, which may be unduly expensive; also, use of multiple amplifying stages slows down overall amplifier performance, requires additional compensation circuitry, and consumes much more current than a single stage amplifier.
Therefore, there is an unmet need for a circuit technique for increasing the open loop gain of a CMOS differential amplifier stage and associated output stage without introducing an unacceptable amount of additional noise, without introducing circuit instability and corresponding compensation problems, and/or without adding additional main gain stages in the signal path.
Accordingly, it is an object of the invention to provide an inexpensive, high-speed CMOS amplifier having a gain boost stage which provides substantially increased amplifier gain without introducing of additional noise and which does not cause an unacceptable amount of circuit instability and corresponding compensation problems.
It is another object of the invention to provide an inexpensive, high-speed CMOS amplifier having a gain boost stage which provides substantially increased amplifier gain without introducing additional noise and which does not cause an unacceptable amount of circuit instability and corresponding compensation problems and which renders insignificant any changes in amplifier gain caused by changes in a load driven by the amplifier.
It is another object of the invention to provide circuitry which constitutes a high precision current mirror and which can be used to provide increased gain in a CMOS amplifier.
It is another object of the invention to provide an inexpensive, high-speed CMOS amplifier without using multiple amplifying stages in the signal path.
Briefly described, and in accordance with one embodiment thereof, the invention provides a differential amplifier circuit including differentially connected first and second input transistors of a first channel type and a folded cascode current summing circuit coupled to a first supply voltage rail and including a first cascode transistor and a second cascode transistor both of the second channel type. The sources of the first and second cascode transistors are coupled to drains of the first and second input transistors, respectively. A bias source provides a bias signal on gates of the first and second cascode transistors, respectively. A third cascode transistor of the second channel type has a source coupled to a drain of the first cascode transistor and a drain coupled to a first bias current source. A drain of the second cascode transistor is coupled to a second bias current source. A gain boost amplifier has an output coupled to the gate of the third cascode transistor, a first input coupled to the drain of the first cascode transistor, and a second input coupled to the drain of the second cascode transistor. An output stage can be provided including a pull-up transistor of the second channel type coupled between the first supply voltage rail and the output terminal, and a second output transistor of the first channel type coupled between the second supply voltage rail and the output terminal. A class AB bias circuit can be coupled between the gate electrodes of the pull-up and pull-down transistors.
In another embodiment, the invention provides a differential amplifier circuit including first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second VINxe2x88x92) input terminals, an output terminal, differentially connected first (2) and second (3) input transistors of a first channel type and a folded cascode circuit coupled to the first supply voltage rail (Vxe2x88x92) and including a first cascode transistor (11) and a second cascode transistor (10) both of a second channel type, sources of the first (11) and second (10) cascode transistors being coupled to drains of the first (2) and second (3) input transistors, respectively. A first load transistor (8) of the first channel type is coupled between the source of the second cascode transistor (10) and the first supply voltage rail (Vxe2x88x92) and a second load transistor (9) of the first channel type is coupled between the source of the first cascode transistor (11) and the first supply voltage rail (Vxe2x88x92). A bias source (VBIAS) produces a bias signal on gates of the first and second cascode transistors, respectively. A gain boost amplifier (16) has a first input (+) coupled to the drain of the second cascode transistor (10), a second input (xe2x88x92) coupled to the drain of the first cascode transistor (11), and an output coupled to gates of the first (8) and second (9) load transistors.
In another embodiment, the invention provides a differential amplifier circuit including first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second (VINxe2x88x92) input terminals, an output terminal, differentially connected first (2) and second (3) input transistors of a first channel type, and a folded cascode circuit coupled to the first supply voltage rail (Vxe2x88x92) and including a cascode transistor (11) of a second channel type, a source of the cascode transistor (11) being coupled to a drain of the first input transistor (2). A first load transistor (8) of the first channel type is coupled between a first current source (13) and the first supply voltage rail (Vxe2x88x92) and a second load transistor (9) of the first channel type is coupled between the source of the cascode transistor (11) and the first supply voltage rail (Vxe2x88x92). A bias source (VBIAS) produces a bias signal on a gate of the cascode transistor (11). A gain boost amplifier (16) has a first input (+) coupled to a drain of the first load transistor (8), a second input (xe2x88x92) coupled to the source of the cascode transistor (11), and an output coupled to gates of the first (8) and second (9) load transistors.
In yet another embodiment, the invention provides a differential amplifier circuit including first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second (VINxe2x88x92) input terminals, an output terminal, differentially connected first (2) and second (3) input transistors of a first channel type, a first load transistor (8) of the first channel type coupled between a drain of the first input transistor (2) and the first supply voltage rail (Vxe2x88x92), and a second load transistor (9) of the first channel type coupled between a drain of the second input transistor (3) and the first supply voltage rail (Vxe2x88x92). A gain boost amplifier (16) includes a first input (+) coupled to the drain of the first input transistor (2), a second input (xe2x88x92) coupled to the drain of the second input transistor (3), and an output coupled to gates of the first (8) and second (9) load transistors.
The invention also provides a method of operating a differential amplifier circuit (40D) which includes first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second (VINxe2x88x92) input terminals, and an output terminal (15), differentially connected first (2) and second (3) input transistors of a first channel type, and a folded cascode circuit coupled to the first supply voltage rail (Vxe2x88x92) and including a first cascode transistor (11) and a second cascode transistor (10) both of a second channel type, sources of the first (11) and second (10) cascode transistors being coupled to drains of the first (2) and second (3) input transistors, respectively, the sources of the first (11) and second (10) cascode transistors also being coupled to a drain of a first load transistor (9) and a drain of a second load transistor (8), respectively. The method includes boosting the gain of the differential amplifier circuit (40D) without introducing additional components into a signal path of the differential amplifier circuit by providing local feedback representative of an output voltage (15) of the differential amplifier circuit to gates of the first (9) and second (8) load transistors by coupling a drain of a third cascode transistor (33) of the second channel type to a current source circuit (13) and coupling a source of the third cascode transistor (33) to a drain of the second cascode transistor (10), coupling a drain of the third cascode transistor (33) to gates of the first (8) and second (9) load transistors, and driving a gate of the third cascode transistor (33) by means of a gain boost amplifier (16) having a first input (+) coupled to the drain of the first cascode transistor (11) and a second input (xe2x88x92) coupled to the drain of the second cascode transistor (10), to accomplish the function of increasing the output impedance of the differential amplifier circuit (40D).
In another embodiment, the invention provides a method of operating a differential amplifier circuit (40E) which includes first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second (VINxe2x88x92) input terminals, and an output terminal (15), differentially connected first (2) and second (3) input transistors of a first channel type, and a folded cascode circuit coupled to the first supply voltage rail (Vxe2x88x92) and including a first cascode transistor (11) and a second cascode transistor (10) both of a second channel type, sources of the first (11) and second (10) cascode transistors being coupled to drains of the first (2) and second (3) input transistors, respectively, the sources of the first (11) and second (10) cascode transistors also being coupled to a drain of a first load transistor (9) and a drain of a second load transistor (8), respectively. The method includes boosting the gain of the differential amplifier circuit without introducing additional components into a signal path of the differential amplifier circuit by providing local feedback representative of an output voltage (15) of the differential amplifier circuit to gates of the first (9) and second (8) load transistors by coupling a first input (xe2x88x92) of a gain boost amplifier (16) to a drain of the first cascode transistor (11), and coupling a second input (+) of the gain boost amplifier (16) to a drain of the second cascode transistor (10), and coupling an output of the gain boost amplifier (16) to gates of the first (9) and second (8) load transistors to drive the first (9) and second (8) load transistors so as to accomplish the function of increasing the output impedance of the differential amplifier circuit (40E).
In another embodiment, the invention provides a method of operating a differential amplifier circuit (100E) which includes first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second (VINxe2x88x92) input terminals, and an output terminal, differentially connected first (2) and second (3) input transistors of a first channel type, and a folded cascode circuit coupled to the first supply voltage rail (Vxe2x88x92) and including a first cascode transistor (11) and a second cascode transistor (10) both of a second channel type, sources of the first (11) and second (10) cascode transistors being coupled to drains of the first (2) and second (3) input transistors, respectively, the sources of the first (11) and second (10) cascode transistors also being coupled to a drain of a first load transistor (9) and a drain of a second load transistor (8), respectively. The method includes boosting the gain of the differential amplifier circuit without introducing additional components into a signal path of the differential amplifier circuit by providing local feedback representative of an output voltage of the differential amplifier circuit to gates of the first (9) and second (8) load transistors by coupling a first input of a gain boost amplifier (16) to the source of the first cascode transistor (11), and coupling a second input of the gain boost amplifier (16) to the source of the second cascode transistor (10), coupling a drain of the second cascode transistor (10) to gates of the first (9) and second (8) load transistors, and coupling an output of the gain boost amplifier (16) to a gate of the second cascode transistor (10) to cause the drain of the second cascode transistor (10) to drive the gates of the first (9) and second (8) load transistors so as to accomplish the function of increasing the output impedance of the differential amplifier circuit.
In another embodiment, the invention provides a method of operating a differential amplifier circuit (40A) which includes first (Vxe2x88x92) and second (V+) supply voltage rails, first (VIN+) and second (VINxe2x88x92) input terminals, and an output terminal, differentially connected first (2) and second (3) input transistors of a first channel type, sources of the first (2) and second (3) input transistors being coupled to the drain of a first load transistor (4) and a drain of a second load transistor (5), respectively. The method includes boosting the gain of the differential amplifier circuit by providing local feedback representative of an output voltage of the differential amplifier circuit to gates of the first (8) and second (9) load transistors by coupling a first input (+) of a gain boost amplifier (16) to a drain of the first load transistor (4), and coupling a second input (xe2x88x92) of the gain boost amplifier (16) to a drain of the second load transistor (5), and coupling an output of the gain boost amplifier (16) to gates of the first (4) and second (5) load transistors to drive the first (4) and second (5) load transistors so as to accomplish the function of increasing the output impedance of the differential amplifier circuit.
In yet another embodiment, the invention provides a current mirror circuit including a supply voltage rail (V+), an input terminal (29), an output terminal (15A), a first transistor (10A), a second transistor (11A), a third transistor (8A) coupled between a source of the first transistor (10A) and the supply voltage rail (V+), and a fourth transistor (9A) coupled between a source of the second transistor (11A) and the supply voltage rail (V+). A first bias source (VBIAS2) produces a bias signal on gates of the first and second transistors. A fifth transistor (33A) has a source coupled to a drain of the first transistor (10A) and a drain coupled to the input terminal (29), a drain of the second transistor (11A) is coupled to the output terminal (15A), a second bias source (VBIAS2A) coupled to gates of the third (8A) and fourth (9A) transistors. An amplifier (16) has a first input (xe2x88x92) coupled to the drain of the second transistor (11A), a second input (+) coupled to the drain of the first transistor (10A), and an output coupled to a gate of the fifth transistor (33A).